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Aug 26, 2026, 9:05 PMAI Infrastructure Hardware

NVIDIA Adds NVHBM to NVLink Fusion, Amazon Trainium4 First in Line

NVIDIA adds NVHBM to NVLink Fusion, promising 30% more bandwidth, 15% lower HBM power and 25% more XPU die area, with Amazon first in line for deployment.

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Summary

On August 26, 2026, NVIDIA expanded NVLink Fusion with NVHBM, a next-generation memory technology for semi-custom AI infrastructure supporting AI agents and trillion-parameter workloads. Unlike standard HBM4E, which places the memory controller on the XPU, NVHBM moves NVIDIA’s custom controller into the 3D HBM base die. NVIDIA claims up to 30% greater memory bandwidth, 15% lower HBM power consumption and 25% more XPU compute-die area. The design uses technology planned for future NVIDIA GPUs and will be validated and offered through multiple memory providers under a standard implementation intended to reduce supplier integration and qualification work.

Amazon’s Annapurna Labs will be the first NVHBM collaborator, working with NVIDIA on the memory technology and NVLink scale-up architecture. Starting with Trainium4, next-generation Trainium chips will support NVLink Fusion, potentially letting Amazon chips and NVIDIA GPUs share a rack-scale architecture; Annapurna Labs vice president Nafea Bshara said the collaboration could benefit future AWS infrastructure. NVLink Fusion gives partners access to NVLink chiplets, NVLink-C2C, NVLink Switches, NVIDIA MGX systems and racks, plus CPU, ASIC, manufacturing and technology partners. NVIDIA will offer it with each rack-scale architecture generation, positioning the platform as a faster, lower-risk route to semi-custom AI systems spanning compute, memory, storage, networking and software.

Positives

  • NVHBM promises up to 30% greater memory bandwidth than standard HBM4E by moving the controller into the memory stack.
  • HBM power consumption could fall 15%, improving efficiency for increasingly demanding AI infrastructure.
  • Up to 25% more XPU compute-die area becomes available when the memory controller moves into the HBM base die.
  • Multiple memory providers will validate and offer a standard NVHBM implementation, reducing integration and qualification work.
  • Trainium4 support could let Amazon chips and NVIDIA GPUs operate within a common rack-scale architecture.
  • NVLink Fusion provides chiplets, switches, NVLink-C2C and MGX infrastructure for faster semi-custom AI system development.

Risks & concerns

  • NVHBM performance and efficiency figures are NVIDIA claims for next-generation technology, with no production results provided.
  • NVIDIA named no participating memory providers or commercial availability date for NVHBM.
  • Trainium4 support remains future-facing, and no rollout schedule was disclosed.
  • Standard HBM4E places its controller on the XPU die, consuming silicon area that could otherwise support compute.
  • NVHBM adoption requires collaboration across memory, XPU and rack-scale infrastructure suppliers despite the standardized design.
Primary sourceNVIDIA Bloghttps://blogs.nvidia.com/?p=97957&preview=true&preview_id=97957
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